1. Field of the Invention
The invention relates to an integrated buffer circuit with an inverter and at least one constant current source (I).
Buffer circuits are often needed in integrated circuits, for example in order to adapt the input signals at the circuits to internally required signal properties (such as specifically required signal levels), or to adapt output signals of circuits to further circuits which receive their output signals. One common disadvantage of buffer circuits is their sensitivity to interference (such as noise) on the lines for the supply voltage. Moreover, their function is highly dependent on voltage fluctuations that might occur in the supply voltage. This is especially true if the buffer circuit is intended to convert signals with TTL levels into signals with CMOS levels (TTL levels: 0 V and 2.4 V; CMOS levels, usually 0 V and 4-6 V, typically 5 V).
2. Description of the Related Art
One buffer circuit of this genus is known from Patent Abstracts of Japan, Vol. 8, No. 53 (E-231) (1490), Mar. 9, 1984, pertaining to JP-A 58-207728 (A). Although the constant current source there already effects some reduction in the aforementioned sensitivity to interference, it does not do so to the extent often desired.